PLL Control

This page will describe how to control the PLL on common GMRS/FRS/PMR/LPD UHF 2-way radios.
Controlling the PLL gives the ability to customized TX and/or RX frequency.

Known PLL´s so far:

Gaintech GP214D
Samsung S1T8825
Toshiba TP31202
MC Devices MCD8825B
Panasonic AN6311

Gaintech GP214D Datasheet

Samsung S1T8825 Datasheet

Toshiba TP31202 Datasheet

MC Devices MCD8825B Datasheet

Download the GP214D/S1T8825/TP31202/MCD8825B PLL Calculator

Panasonic AN6311 No datasheet available.

The AN6311 is used for example in ALAN-445 Sport radio. See schematic

How to control the AN6311 PLL #

Three control signals are required: CLKIN, DATAIN, EN
Pins: CLKIN = 56, DATAIN = 55, EN = 1
Three types of frames are used:
- 1 Frame to set reference counter – Length 17 bit
- 1 Frame to with configuration bits – Length 18 bit
- 1 Frame to set the programmable and swallow counter – Length 19 bit
Frames will be transferred MSB first

Bus timing #

CLKIN t1 = 2us; t0 = 10us
DATAIN changes 2us before CLKIN rising edge
DATAIN goes LO 6us after last CLKIN falling edge
EN goes HI 2us after last DATAIN falling edge
EN t1 = 2us
Delay between two frames 100us

Init sequence #

Power up
CLKIN & EN = LO while DATAIN = HI for 1-2 seconds, depends on radio CPU startup

Frame = set reference counter; 0x99A7 for 6.25 KHz channel spacing 50us pause
Frame = set reference counter; 0x99A7 for 6.25 KHz channel spacing 300us pause
Frame = set PLL configuration; 0x02E805 for RX 100us pause
Frame = set programmable and swallow counter; 0x0469A9 for 451.8625 MHz = RX FRS chan 1 800us pause
Frame = set PLL configuration; 0x02E805 for RX 100us pause
Frame = set programmable and swallow counter; 0x0469A9 for 451.8625 MHz = RX FRS chan 1

Offset between RX and TX frequency depends on intermediate frequency used in RX stage.

Set TX mode and frequency #

Frame = set PLL configuration; 0x02E005 for TX 100us pause
Frame = set programmable and swallow counter; 0x048469 for 462.5625 MHz = TX FRS chan 1 100us pause
Frame = set PLL configuration; 0x02E205 for RX 100us pause
Frame = set PLL configuration; 0x02E205 for TX

End TX and set back to RX frequency #

Frame = set PLL configuration; 0x02E805 for RX 100us pause
Frame = set programmable and swallow counter; 0x0469A9 for 451.8625 MHz = RX FRS chan 1

Frame description (what is known so far) #

Frame to set reference counter, 17-bit

01001100110100111

Unknown Reference counter, 001100110100 = 0x334 = 820 Register code

Frame to set frequency, 19-bit

1000110100110101001

11-bit programmable counter, 10001101001 = 0x469 = 1129 5-bit swallow counter, 10101 = 0x15 = 21 Register code

How to calculate PLL counters for desired TX frequency #

Things you need to know:

PLL oscillator frequency, ie. 10.25MHz
Channel spacing, ie. 6.25KHz
TX frequency, ie. FRS channel 1 = 462.5625MHz

1. Calculate reference counter
    Reference counter = PLL oscillator frequency / Channel spacing / 2
    Reference counter = 10.25MHz / 6.25KHz / 2 = 820
2. Calculate total divide ratio
    Total divide ratio = TX frequency / Channel spacing
    Total divide ratio = 462.5625MHz / 6.25KHz = 74010
3. Calculate programmable counter
    Programmable counter = (Total divide ration / 2) / 32
    Programmable counter = (74010 / 2) / 32 = 1156
4. Calculate swallow counter
    Swallow counter = (Total divide ration / 2) – (32 * Programmable counter)
    Swallow counter = (74010 / 2) – (32 * 1156) = 13

How to calculate PLL counters for desired RX frequency #

To calculate the RX frequency from a known TX frequency, you need to know the intermediate frequency used in the RX stage of the radio, for example 10.7MHz or 21.4Mhz.

Example:

PLL oscillator frequency, ie. 10.25MHz
Channel spacing, ie. 6.25KHz
TX frequency, ie. FRS channel 1 = 462.5625MHz
Intermediate frequency 10.7MHz

1. Calculate RX frequency
    RX frequency = TX frequency – Intermediate frequency
    RX frequency = 462.5625MHz – 10.7MHz = 451.8625MHz
2. Calculate reference counter
    Reference counter = PLL oscillator frequency / Channel spacing / 2
    Reference counter = 10.25MHz / 6.25KHz / 2 = 820
3. Calculate total divide ratio
    Total divide ratio = TX frequency / Channel spacing
    Total divide ratio = 451.8625MHz / 6.25KHz = 72298
4. Calculate programmable counter
    Programmable counter = (Total divide ration / 2) / 32
    Programmable counter = (72298 / 2) / 32 = 1129
5. Calculate swallow counter
    Swallow counter = (Total divide ration / 2) – (32 * Programmable counter)
    Swallow counter = (72298 / 2) – (32 * 1129) = 21

Download the AN6311 PLL Calculator

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